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SR ENGINEER/ PRINCIPAL ENGINEER, FE CPIE RAM (RDA & METROLOGY) DETECTION

Fab 10A, Singapore💼 Full-time🗓 2026-03-20 → 2026-07-31

Core

Establishing 100% inline visibility and control for RAM (Resistive Anodic Bonding) detection, improving detection strategy to enable yield improvement and strengthen defense lines.

Role type

Senior/Principal Process Integration Engineer (RDA & Metrology)

Builds

Inspection and measurement equipment processes, global best known methods (BKM), and supplier tool roadmaps for memory manufacturing.

Domain

Semiconductor manufacturing (Memory/Storage), specifically RDA and Metrology.

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

RDA and Metrology expertise, project management, supplier engagement, process parameter setup, global strategy alignment, cross-site BKM sharing, fab performance benchmarking.

Preferred skills

Experience with Tool of Record (TOR) processes, Model of Records (MOR), Manufacturing Tool Evaluation Program (MTEP), supplier change management, international travel for extended assignments.

Technologies

Inspection and Measurement equipment, RDA tools, Metrology tools.

Responsibilities

Establish detection strategy and system methods for 100% inline visibility; set up process parameters for inspection and measurement equipment; lead the Copy Smart Team (CST) and drive global peer group alignment; manage global business for the RAM area including TOR, MOR, and MTEP; track Fab performance metrics and identify gaps; partner with Technology Development and Global Procurement to drive supplier competitiveness; provide tactical support for yield, quality, cost, and cycle time issues.

Seniority

Senior/Principal, hands-on IC with strategic leadership

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