PCIe Design Verification Intern - Summer 2027
Core
Develop directed or random diagnostics to validate processor ISA, reference models, C simulation models, RTL models, HW emulators, and real hardware for PCIe and CXL functionality.
Role type
Summer 2027 Design Verification Intern (PCIe/CXL)
Builds
PCIe and CXL hardware functionality and performance
Domain
Semiconductor hardware verification (PCIe/CXL)
Required skills
Computer architecture, ASIC design, verification methodology, Object Oriented programming, SystemVerilog, Python scripting, Perl scripting
Preferred skills
Directed and random functional testing, automation of build/test processes, hardware simulation, waveform debug tools
Responsibilities
Develop diagnostics to validate processor models and hardware, write and review validation test plans, debug diagnostics on various platforms, collaborate on planning and deployment
Seniority
Intern
