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Deep Learning Compiler Engineer - CUDA

2 Locations💼 Full-time🗓 2026-07-10 → 2026-09-26

Core

Design and implement the DSL and core compiler for a tile-aware GPU programming model to optimize performance on emerging GPU architectures.

Role type

Senior IC compiler architect (GPU/CUDA)

Builds

Next-generation GPU architectures, DSLs, and compiler stacks for AI/LLM workloads

Domain

Hardware/Software co-design, GPU architecture, High-Performance Computing (HPC)

Deliverable

production ML models | infrastructure

Required skills

C/C++ programming, computer architecture fundamentals, compiler development (MLIR/TVM/Triton/LLVM), GPU kernel programming

Preferred skills

LLM algorithms, multi-GPU distributed communication, abstract problem solving

Technologies

CUDA, MLIR, TVM, Triton, LLVM

Responsibilities

Design and implement DSLs and core compilers for tile-aware GPU programming models; Innovate and iterate on compiler core architecture to optimize performance; Investigate next-generation GPU architectures and provide solutions in the DSL and compiler stack; Perform performance analysis on emerging AI/LLM workloads and integrate with AI/ML frameworks

Seniority

Senior, hands-on IC

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