Senior DL Compiler Engineer - CUDA Tile LPU
Core
Design and implement compiler transformations, MLIR-based dialects, and lowering passes for NVIDIA's CUDA Tile programming model to optimize performance across GPU and LPU architectures.
Role type
Senior IC compiler engineer (CUDA Tile)
Builds
CUDA Tile compiler infrastructure and optimized tile-based kernels for NVIDIA LPUs
Domain
Deep learning infrastructure, GPU/LPU architecture, compiler optimization
Deliverable
production ML models
Required skills
C/C++ programming, compiler optimization, MLIR, performance analysis, IR design, CUDA/OpenCL knowledge
Preferred skills
CPU/GPU architecture knowledge, XLA, TVM, deep learning models and algorithms
Technologies
CUDA, MLIR, LLVM, XLA, TVM
Responsibilities
Design and implement compiler transformations, develop MLIR-based dialects and lowering passes, optimize performance of tile-based kernels, define public APIs, craft compiler and optimization techniques
Seniority
Senior, hands-on IC
