CareerPlan

Senior/Principal Eng, FE OCT CPEE PHOTO METROLOGY

Taichung - Fab 16, TaiwanFull-time2026-09-10 → 2026-11-11

Core

Lead HVM photo/overlay metrology yield, quality, productivity, and cost improvement initiatives while resolving complex issues through data-driven root-cause analysis.

Role type

Senior/Principal IC semiconductor metrology engineer

Builds

High-volume manufacturing (HVM) and New Product Introduction (NPI) memory and storage solutions

Domain

Semiconductor manufacturing (photolithography)

Required skills

photo/overlay metrology engineering, yield improvement, root-cause analysis, Best Known Methods (BKM) deployment, cross-fab alignment, supplier management, data-driven problem solving

Preferred skills

AI tool integration, global team collaboration, business travel

Technologies

photo/overlay metrology tools, reticle correction, destack, MMM

Responsibilities

Lead HVM photo/overlay metrology yield, quality, productivity, and cost improvement initiatives; Resolve complex photo/overlay metrology issues through data-driven root-cause analysis; Define and deploy photo/overlay metrology Best Known Methods (BKM) across fabs for HVM and NPI; Act as the technical point for cross-fab, complex photo/overlay metrology customer concerns; Drive MOR–POR gap closure and cross-fab/node alignment in collaboration with internal teams and suppliers; Influence key suppliers and represent OCT in reviews, workshops, and governance forums

Seniority

Senior/Principal, hands-on IC