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IE Layout Senior engineer

Taichung - Fab 16, Taiwan💼 Full-time🗓 2026-09-01 → 2026-09-26

Core

Lead front-end semiconductor fab design and process tool planning for new fab construction, expansion, and remodeling projects.

Role type

Senior IC industrial engineering layout engineer (semiconductor manufacturing)

Builds

Cleanroom layouts, tool siting plans, process area configurations, and material handling networks for semiconductor fabs

Domain

Semiconductor manufacturing / Industrial engineering

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

semiconductor fab design, cleanroom layout strategy, tool siting planning, process area configuration, facility integration, footprint optimization, data-driven decision-making, project coordination, change management, risk mitigation

Preferred skills

AI-enabled planning tools, data analytics, digital engineering platforms, automation solutions, AI literacy

Technologies

AI-enabled tools, data analytics, visualization tools, automation solutions, digital engineering platforms

Responsibilities

Lead front-end semiconductor fab design and process tool planning; Develop and maintain cleanroom layout strategies; Evaluate and define tool siting plans and process area configurations; Partner with Process Engineering to translate roadmaps into facility solutions; Collaborate with Facilities, Utilities, Construction, and AMHS teams; Drive footprint optimization and layout scenario analysis; Coordinate design reviews across stakeholder groups; Support fab readiness activities including field verification and risk mitigation; Ensure compliance with safety, quality, and environmental standards; Contribute to long-range manufacturing planning with innovative design solutions.

Seniority

Senior, hands-on IC

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