Process Engineer, Photomask Inspection
Core
Develop, optimize, and sustain reticle inspection processes (EUV, ADC) to ensure zero printing defects and high yield in semiconductor manufacturing.
Role type
Senior IC process engineer (photomask/reticle inspection)
Builds
Inspection processes, ADC algorithms, and defect avoidance solutions for EUV and High-NA lithography roadmaps
Domain
Semiconductor manufacturing, lithography, reticle inspection
Deliverable
production ML models | product features
Required skills
reticle pattern inspection, Automatic Defect Classification (ADC) tuning, systematic problem-solving (MBPS, RCA, FMEA, 8D), statistical data analysis (SPC/FDC), equipment qualification, yield improvement
Preferred skills
EUV reticle inspection, next-generation capital equipment qualification, AI/advanced analytics for inspection efficiency
Technologies
EUV inspection tools, ADC algorithms, SPC/FDC systems, AI tools
Responsibilities
Start up and optimize photomask inspection processes; diagnose and resolve manufacturing issues using Failure Analysis and statistical methods; lead continuous yield and cost reduction initiatives; monitor tool health and inspection results; research and qualify new inspection techniques and baselines; collaborate with R&D and manufacturing teams on defect analysis and printability assessment; mentor manufacturing personnel and engineers.
Seniority
Senior, hands-on IC