SNR ENGINEER, PD SG CMP
Core
Develop and optimize Chemical Mechanical Planarization (CMP) processes for next-generation 3D NAND nodes, transferring them to high-volume manufacturing and improving process margins.
Role type
Senior IC process development engineer (CMP)
Builds
3D NAND memory chips
Domain
Semiconductor manufacturing / Materials Science
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
CMP process characterization, failure analysis, FMEA, 8D, SPC/FDC, Design of Experiments (DoE), data analysis systems (Y3), consumables development, hardware evaluation, AI-driven workflow optimization
Preferred skills
Experience with AMAT or EBARA equipment, patent generation, multi-functional project leadership
Technologies
Y3, AI tools, AMAT, EBARA
Responsibilities
Perform fundamental research and testing for novel CMP applications; manage experiments to widen process margins; identify process simplification opportunities; design advanced process monitoring and control methodologies; lead multi-disciplinary projects for yield and cost improvement; provide technical counsel to management on significant issues.
Seniority
Senior, hands-on IC
