Frame Design Engineer - Tapeout Operations (3pm-12am shift)
Core
Design and manage semiconductor manufacturing frames (structures/layout) for chip tapeout operations, supporting global fab and mask house automation.
Role type
Frame Design Engineer (Tapeout Operations)
Builds
Semiconductor chip frames and input files for fab/mask house automation
Domain
Semiconductor manufacturing / Chip fabrication
Required skills
Unix shell scripting, Failure Mode and Effect Analysis (FMEA), structured problem-solving, cross-functional collaboration, process documentation, safety compliance
Preferred skills
Cadence Mask Compose, Virtuoso environment, SKILL programming, Device Layout knowledge
Technologies
Unix, Cadence Mask Compose, Virtuoso, SKILL
Responsibilities
Facilitate frame requirements, structures layout, and generation; execute ad-hoc changes and prioritize work queues; escalate or reject tapeout support issues; collaborate with FAB and TD teams to improve efficiency and reduce costs; assess business processes for automation and continuous improvement; ensure documented processes with failure mitigation.
Seniority
Mid-level IC