Quantum Cryo CMOS Design Enablement
Core
Establishing cryogenic CMOS design enablement capability to support quantum technologies through PDK development, model creation, and test infrastructure.
Role type
Sr. Manager / Deputy Director, Quantum Cryo CMOS Design Enablement
Builds
Process Design Kits (PDKs), compact models, variability models, and validated design flows for cryogenic CMOS platforms.
Domain
Semiconductor manufacturing, quantum computing hardware, cryogenic electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Device modeling, cryogenic characterization, PDK development, team leadership, EDA engagement, test infrastructure design, statistical modeling, cross-functional execution, technical strategy, stakeholder management
Preferred skills
Cryogenic electronics experience, quantum computing hardware knowledge, low-temperature device physics, test lab scaling, EDA vendor collaboration, government/academic research collaboration, senior engineering mentorship
Technologies
Cryogenic CMOS, EDA tools, test infrastructure, measurement techniques
Responsibilities
Define and lead the cryogenic CMOS design enablement roadmap; Build and lead a multidisciplinary team; Drive development of cryogenic CMOS PDKs; Establish cryogenic test lab capabilities; Define electrical characterization methodologies; Oversee test chip design; Partner with EDA vendors; Drive cross-functional execution; Define technical milestones and communicate progress; Serve as senior technical interface with customers and partners
Seniority
Senior, hands-on IC with organizational leadership
