BootROM & Security Lead - RISC-V MPU
Core
Design, implement, and maintain a production-quality secure boot and Root of Trust stack for a 64-bit RISC-V MPU platform, enabling Linux systems with multimedia, industrial connectivity, and heterogeneous compute.
Role type
Senior IC embedded security engineer (RISC-V SoC)
Builds
Secure boot firmware, Root of Trust stack, and SDK releases for application-class RISC-V MPUs
Domain
Semiconductor, embedded systems, RISC-V architecture
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
C programming, Linux internals, SoC bring-up, U-Boot, Device Tree, Yocto/OpenEmbedded, GDB debugging, FPGA/emulation validation
Preferred skills
RISC-V security, ARM TrustZone/EL3, OpenSBI, secure monitor layers, CI/CD for boot validation
Technologies
RISC-V, Linux kernel, U-Boot, OpenSBI, Yocto, OpenOCD, Lauterbach, GDB
Responsibilities
Design and implement secure boot and Root of Trust stack; Enable and harden boot/firmware stack (BootROM/FSBL, U-Boot); Develop platform security components (crypto, key services, attestation); Integrate OS-level security (kernel/BSP, Device Tree, memory regions); Validate security on FPGA and first silicon; Deliver security collateral for SDK releases
Seniority
Senior, hands-on IC
