Sr. Silicon Design Engineer: Hardware-Software Co-Design
Core
Co-design the hardware-software interface for AMD Instinct™ GPUs by modeling interactions between GPU microarchitecture, AI frameworks, and the ROCm™ software stack to improve performance and energy efficiency.
Role type
Senior Silicon Design Engineer (Hardware-Software Co-Design)
Builds
AMD Instinct™ GPU microarchitecture and ROCm™ software stack
Domain
Semiconductor / AI Compute
Deliverable
production ML models
Required skills
GPU microarchitecture modeling, performance/power modeling, C/C++ (system-level), Python, CUDA/HIP kernel optimization, Linux kernel internals (DRM/GEM), compiler infrastructure (LLVM/MLIR/IREE), AI framework internals (PyTorch/Triton), hardware-software co-design methodology
Preferred skills
AMD Instinct GPU architecture experience (MI300X/MI350X/MI355X), ROCm™ stack expertise, quantization/KV cache/attention mechanisms knowledge, GPU performance analysis tooling, publications/patents in HPC or GPU optimization
Technologies
ROCm™, IREE, LLVM/MLIR, PyTorch, Triton, CUDA, HIP, Linux Kernel, DRM/GEM
Responsibilities
Build performance and power models connecting architectural decisions to workload behavior; Evaluate hardware features and software API designs against AI training/inference targets; Write and optimize GPU kernels and compiler passes; Collaborate with hardware/firmware teams on memory subsystem and cache coherence impacts; Contribute to IREE compiler and ROCm™ runtime backend optimizations; Develop reproducible benchmarks and performance regression infrastructure
Seniority
Senior, hands-on IC
