Cores Verification Lead
Core
Lead the design, development, and optimization of scalable build infrastructure to reduce model build turnaround times and improve engineering productivity for next-generation microprocessor designs.
Role type
Senior IC build infrastructure lead (semiconductor)
Builds
Scalable build systems and automation for CPU core development (Zen8, Zen9)
Domain
Semiconductor / Silicon Design / EDA
Deliverable
infrastructure
Required skills
Build system design, Build orchestration, Distributed build infrastructure, Compute farm scheduling, Build caching, Artifact management, CI/CD, Automation, Technical leadership, Cross-functional collaboration
Preferred skills
Hyperscale build solutions, Legacy system modernization, Semiconductor design workflows, EDA environments, Large-scale engineering workflows
Technologies
LSF, Build systems, CI/CD tools
Responsibilities
Lead design and optimization of scalable build infrastructure, Drive organization-wide build system modernization, Improve compute resource utilization and LSF farm efficiency, Architect hyperscale build solutions, Provide technical leadership for build architecture transitions, Partner with silicon design and software teams to define automation strategies, Establish best practices for build infrastructure and CI/CD
Seniority
Senior, hands-on IC
