CareerPlan

Silicon Co-design Intern - 2027

China, ShanghaiInternship2026-09-12 → 2026-11-10

Core

Intern working on GPU/SOC feature/IP bring-up, characterization, validation, tuning, and optimization to ensure products ship at target frequency and quality.

Role type

Intern, silicon co-design engineer

Builds

GPU and SOC silicon products

Domain

Semiconductor hardware engineering (GPU/SOC)

Deliverable

production ML models

Required skills

Digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, scripting, Python, Linux/Windows OS, silicon bring-up, frequency characterization, power characterization, lab tools usage (oscilloscopes, multimeters, DAQ), high-performance circuit knowledge (Low power, PLLs, clocking, SerDes, high-speed IO, SRAMs, power delivery/regulation, security circuits)

Preferred skills

Firmware/driver structures knowledge, system-level architecture design, productization, debugging, deployment

Technologies

Python, Linux, Windows

Responsibilities

Create validation, tuning, and optimization methodologies; develop test plans and test cases; perform system-level use case analysis and profiling; prototype and validate new technology; design tools/scripts to automate product definitions and data analysis; execute hands-on silicon bring-up, validation, and debug; coordinate product-level feature deployment.

Seniority

Intern