CareerPlan

Process Engineer Internship: Enhancing CVD process efficiency and film quality through systematic recipe optimization

Singapore,SGPInternship2026-08-31 → 2026-10-23
Based in Singapore

Core

Systematic development and optimization of CVD process recipes and settings to improve film properties (thickness, uniformity, stress) while maximizing throughput and minimizing waste.

Role type

Process Engineer Intern

Builds

Robust, repeatable deposition recipes for semiconductor manufacturing

Domain

Semiconductor manufacturing / Materials science

Required skills

Thin-film deposition concepts, Vacuum systems knowledge, Statistical data analysis, Design of Experiments (DoE), Laboratory safety protocols

Responsibilities

Analyze current process limitations, Design targeted experiments, Refine process parameters