Process Control Defectivity Engineer
Core
Metrology Engineer specializing in SEMVision defect analysis to strengthen defect characterization and yield engineering capability.
Role type
Senior IC metrology engineer (defect analysis)
Builds
Semiconductor and display manufacturing yield improvements
Domain
Semiconductor manufacturing / Materials science
Required skills
SEMVision operation, Automatic Defect Classification (ADC), EDX elemental analysis, defect Pareto/wafer map analysis, root-cause analysis, Failure Analysis (FA) interpretation, data correlation with metrology/yield data, process integration knowledge
Preferred skills
Python/scripting, JMP/Klarity, FIB/TEM/STEM/EDS/Auger/SIMS techniques
Technologies
SEMVision, JMP, Excel, Klarity, FIB, TEM, STEM, EDS, Auger, SIMS
Responsibilities
Operate SEMVision to review defects and perform high-resolution imaging; Classify defects manually and via ADC; Perform EDX elemental analysis; Analyze defect Pareto and wafer maps to identify yield limiters; Drive defect root-cause analysis; Define and request follow-up Failure Analysis; Correlate defect data with inline metrology and yield data; Collaborate with process integration teams to implement corrective actions; Develop and optimize SEMVision review recipes.
Seniority
Mid-level, hands-on IC