高性能算子专家（存算与AI） - 芯片研发
Core
Develop high-performance operators for self-developed heterogeneous computing platforms (CPU, GPU, DSP, NPU) to support AI large models and break the 'memory wall' bottleneck.
Role type
Senior IC high-performance computing operator engineer (NPU/CUDA)
Builds
High-efficiency AI chips and operator libraries for AI large models
Domain
Semiconductor / AI Hardware / Heterogeneous Computing
Deliverable
production ML models
Required skills
C++, CUDA, OpenCL, parallel computing, memory optimization, Roofline analysis, deep learning operator principles
Preferred skills
NPU architecture, instruction set architecture, compiler collaboration, toolchain development
Technologies
C++, CUDA, OpenCL, Linux, Git, CMake
Responsibilities
Develop operators for CPU/GPU/DSP/NPU backends; Optimize performance via parallelization, data reuse, and vectorization; Design operator interfaces and metadata for graph compilers; Collaborate on software-hardware co-design for NPU microarchitecture; Build operator development and performance analysis toolchains.
