边缘AIInfra工程师（存算与AI） - 芯片研发
Core
Design and optimize high-efficiency AI chips based on in-memory computing architectures for large model applications, breaking the 'memory wall' bottleneck.
Role type
Senior IC Edge AI Infrastructure Engineer (Chip & System Optimization)
Builds
High-efficiency AI chips and optimized deployment of large models on edge devices
Domain
Semiconductor / AI Infrastructure / Edge Computing
Deliverable
production ML models
Required skills
C++ development, Python, Deep Learning frameworks (PyTorch, JAX), AI Compilers (MLIR, Triton, XLA), Large Model Optimization (Quantization, Distillation, Pruning), NPU/GPU deployment
Preferred skills
Experience with inference frameworks (Llama.cpp, vLLM, SGLang), Model training framework optimization
Technologies
C++, Python, PyTorch, JAX, MLIR, Triton, XLA, Llama.cpp, vLLM, SGLang
Responsibilities
Research deployment and optimization of large models on heterogeneous CPU/GPU/NPU platforms; Deploy and optimize large models on edge devices to improve inference efficiency; Optimize LLM training frameworks to improve iteration efficiency and reduce costs.
