AI编译器专家（存算与AI） - 芯片研发
Core
Design, develop, and optimize AI compilers for in-memory computing (存算一体) NPU architectures to enable high-efficiency inference and training for large AI models.
Role type
Senior AI Compiler Engineer (In-Memory Computing)
Builds
High-efficiency AI chips and compiler toolchains for large language models, CNNs, and Transformers.
Domain
Semiconductor / AI Hardware / Compiler Infrastructure
Deliverable
production ML models
Required skills
AI compiler design, graph optimization, intermediate representation (IR) conversion, code generation, runtime integration, heterogeneous computing, memory hierarchy optimization, performance profiling, deep learning operators, parallel computing
Preferred skills
MLIR, LLVM, TVM, XLA, IREE, Glow, hardware-software co-design, automated testing frameworks
Technologies
PyTorch, ONNX, CNN, Transformer, LLM, Tiling, DMA, SRAM, SIMD/SIMT
Responsibilities
Design and optimize compiler mapping and scheduling (tiling, parallel mapping, on-chip memory planning), optimize memory reuse and data residency to reduce data movement, collaborate on operator/runtime/hardware efficiency, participate in hardware-software co-design for instruction sets and microarchitecture, build compiler testing and regression systems.
Seniority
Senior, hands-on IC
