交换芯片架构师 - 网络
Core
Define specifications for switch chips to meet AI cluster interconnect and networking requirements for large model training/inference.
Role type
Senior switch chip architect (network)
Builds
High-performance switch chips for datacenter and AI clusters
Domain
Semiconductor / Network Infrastructure / AI Systems
Deliverable
production ML models
Required skills
Switch chip architecture, Ethernet protocols, Datacenter lossless networking, AI cluster interconnect, System modeling (C/C++/SystemC/Python), ASIC flow-to-silicon process
Preferred skills
RDMA, QUIC, SDN/NFV, Network observation platforms
Responsibilities
Translate AI business characteristics into switch chip specs, lead architecture design and PPA trade-offs, drive cross-layer collaboration with XPU/NIC teams, lead full-chip R&D from front-end to mass production, plan next-gen product roadmaps
