硬件加速模型编译优化工程师-Data
Core
Adapt large-scale models to proprietary chips, optimize software-hardware co-design, and build distributed inference systems for high throughput and cost-efficiency.
Role type
Senior IC hardware-accelerated model compilation and optimization engineer
Builds
Proprietary AI chips, distributed inference frameworks, and optimized deployment pipelines
Domain
AI hardware acceleration, compiler optimization, and large-scale model deployment
Deliverable
production ML models
Required skills
AI accelerator architecture, parallel computing, C/C++, Python, deep learning frameworks (ONNX, TensorFlow, PyTorch), model quantization, sparsity, distillation
Preferred skills
Compiler optimization (MLIR, TVM), GPU/AI chip architecture, LLM/multimodal model expertise, quantization tool development, cluster architecture, inference frameworks (vLLM, SGLang)
