软硬件架构探索工程师-AI工具链
Core
Design AI chip hardware-software architecture, analyze LLM/AIGC model structures, and guide hardware parameter and micro-architecture optimization.
Role type
Senior IC AI chip architecture engineer (hardware-software co-design)
Builds
Distributed training and deployment solutions for AI chips, multi-card interconnect topologies, and Roofline hardware simulation systems
Domain
Semiconductor / AI Infrastructure / High-Performance Computing
Deliverable
production ML models
Required skills
Deep learning frameworks, GPGPU/ASIC NPU architecture, LLM/AIGC distributed training, C++, Python, multi-card interconnect topology
Preferred skills
LLM/AIGC business integration, multi-node multi-card distributed training, hardware memory hierarchy, heterogeneous computing units, on-chip NOC, inter-chip communication protocols, MLI/LLVM/PyTorch development, GPU/FPGA/AI chip evaluation