Wafer Fab Yield Process Engineer
Core
Drive systematic yield improvement across semiconductor wafer fabrication by analyzing manufacturing, metrology, defect, and electrical test data to identify root causes and implement corrective actions.
Role type
Senior IC Wafer Fab Yield Process Engineer
Builds
Improved manufacturing yield and process stability for semiconductor devices
Domain
Semiconductor manufacturing (Wafer Fab)
Required skills
Statistical analysis (correlation, regression, DOE, SPC), Root cause analysis, Wafer map/spatial analysis, Cross-functional leadership, Data mining, Process capability analysis
Preferred skills
Wafer-map spatial-pattern analysis, Semiconductor defect inspection, Automated yield-analysis tool development, Device physics knowledge, Technology ramp support
Technologies
JMP, SPC tools, DOE platforms
Responsibilities
Lead yield improvement initiatives and prioritize yield-loss mechanisms; Analyze probe maps, electrical test data, and defect inspection data; Perform statistical analysis and trend analysis to identify process-yield relationships; Lead complex root-cause investigations for yield degradation; Define and execute structured experiments (DOE) to validate yield drivers; Correlate WAT, wafer sort, and inline monitoring data; Develop engineering reports on yield trends and root causes; Mentor engineers in statistical analysis and fab troubleshooting.
Seniority
Senior, hands-on IC