AI异构计算优化专家 - Seed Model
Core
Evaluate, optimize, and deploy heterogeneous computing chips for AI inference and training workloads to reduce latency and increase throughput.
Role type
Senior IC AI Heterogeneous Computing Optimization Engineer
Builds
High-performance inference and training systems for large-scale AI models (MLLM, GenMedia) on custom hardware
Domain
AI Infrastructure / Heterogeneous Computing / Chip Optimization
Deliverable
production ML models
Required skills
C/C++, Python, Linux, Machine Learning Frameworks (PyTorch/TensorFlow), Deep Learning Models (GPT, SD, DiT), Parallel Computing Architectures, Operator Development, Compiler Technology
Preferred skills
Ascend/Cambricon optimization, SIMD/SIMT models, Model Pruning/Quantization, AI Compilers (XLA, TVM, MLIR), GPU Architecture (CUDA, cuBLAS), Torch2.0+ stack
Responsibilities
Evaluate heterogeneous computing chips and build assessment frameworks; Optimize chip characteristics for inference latency and throughput; Optimize memory usage and throughput for training workloads; Develop high-performance operators; Implement efficient hardware programming paradigms via compilation; Research emerging hardware-software directions (Sparse, In-Memory, DataFlow computing)
