AI异构计算优化专家 - Seed Model
Core
Evaluate and optimize heterogeneous computing chips for AI inference and training workloads to reduce latency and increase throughput.
Role type
Senior IC AI Heterogeneous Computing Optimization Engineer
Builds
Optimized inference and training pipelines on custom AI chips for Seed team's foundational models and applications.
Domain
AI Infrastructure / Heterogeneous Computing / Chip Optimization
Deliverable
production ML models
Required skills
C/C++, Python, Linux, Machine Learning Frameworks (PyTorch/TensorFlow), Deep Learning Models (GPT/SD/DiT), Parallel Computing Architectures, High-Performance Operators, AI Compilers (TVM/MLIR/XLA), GPU Architecture (CUDA/cuBLAS)
Preferred skills
Ascend/Cambricon optimization, SIMD/SIMT models, Model Pruning/Quantization, LLM Speculative Sampling, Torch2.0+ compilation stack, Triton
Responsibilities
Establish evaluation frameworks for heterogeneous chips; Adapt chips for inference to lower latency; Optimize memory usage for training; Develop high-performance operators; Implement efficient hardware programming paradigms via compilation; Research emerging hardware-computation directions.
Seniority
Senior, hands-on IC
