Lead Integrated Photonics Simulation and Layout Engineer
Core
Lead the layout of state-of-the-art photonic integrated devices and circuits, supporting PDK development with commercial foundries and contributing to quantum photonic platforms.
Role type
Lead Integrated Photonics Simulation and Layout Engineer
Builds
Parameterized component cell (PCell) libraries, automated layout workflows, and full-reticle tapeouts for quantum photonic devices.
Domain
Quantum computing hardware, integrated photonics, semiconductor fabrication
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Photonic simulation (Lumerical, Tidy3D, COMSOL), Python-based layout tools (KLayout, gdsfactory, Luceda IPKISS), PDK development, full-reticle tapeout ownership, physical verification (DRC, LVS), diamond photonics, thin-film lithium niobate, ion trap photonics
Preferred skills
Agentic AI workflows, software engineering for layout automation, distributed quantum computing architectures
Technologies
Lumerical, Tidy3D, COMSOL, KLayout, gdsfactory, Luceda IPKISS
Responsibilities
Lead component design and layout for PDK development; Support design for diamond, thin-film lithium niobate, and ion trap photonics; Own full-reticle tapeouts from floorplanning to GDS generation; Partner with fabrication and test teams to validate PDK components.
Seniority
Lead, hands-on IC with strategic oversight
