STAGE - Ingénieur SoC design STM32 - F/H
Core
Improving methods and tools for verifying integrated test logic in STM32 microcontrollers to ensure chip quality and compliance.
Role type
Intern, SoC Design for Test (DFT) Engineer
Builds
Internal verification tools and test logic for STM32 microcontrollers
Domain
Semiconductor / Microelectronics / SoC Design
Required skills
Digital IC design, VHDL/Verilog, Simulation software, C, TCL, Python, Perl, GitHub Copilot
Preferred skills
STM32 knowledge
Responsibilities
Familiarize with SOC DFT methods and tools (HDL development, SOC integration, verification, ATPG), implement identified improvements in internal tools, propose and validate new enhancements, write technical documentation, use AI tools to accelerate development while critically evaluating results
