STAGE – Optimisation des arrêts de plasma dans des équipements PECVD - F/H
Core
Optimizing the RF Purge step during plasma extinction in PECVD tools to reduce plasma instability and particle generation, improving dielectric layer quality.
Role type
Process Engineering Intern (Master 2 or final year engineering student)
Builds
300mm semiconductor manufacturing processes
Domain
Semiconductor manufacturing / Microelectronics / Plasma Physics
Required skills
Plasma process knowledge, RF Purge optimization, DOE (Design of Experiments), Metrology interpretation (XPS, ellipsometry), Cross-functional collaboration
Preferred skills
Materials science or Chemistry background, Semiconductor industry interest
Technologies
PECVD, RF Purge, XPS, Ellipsometry
Responsibilities
Conducting a baseline assessment of RF Purge across dielectric deposition processes, Collaborating with equipment vendors and maintenance teams to define optimization recommendations, Designing and executing DOE plans on critical processes, Deploying successful recommendations to production
Seniority
Intern / Trainee