CIFRE - Intégration d’architectures de qubits de spin en silicium en technologie CMOS FDSOI avancée pour le calcul quantique (F/H)
Core
Designing and characterizing spin-qubit architectures in advanced CMOS FDSOI technology for fault-tolerant quantum computing. (via careerplan.io/jobs/563637172640948-cifre-integration-darchitectures-de-qubits-de-spin-en-silicium-en-technologie-cmos-fdsoi-a)
Role type
PhD researcher (CIFRE) in quantum device physics and semiconductor integration
Builds
Spin-qubit devices and Single Electron Transistor (SET) architectures on silicon
Domain
Quantum computing / Semiconductor physics / CMOS FDSOI technology
Required skills
Semiconductor device physics, MOSFET/FDSOI/FinFET technology, CMOS process flow, cleanroom operations, electrical characterization, 3D device simulation, cryogenic testing, lithography techniques
Preferred skills
Single Electron Transistor (SET) design, 2D qubit matrix architecture, advanced dielectric trap characterization
Technologies
CMOS FDSOI, 3D simulation tools, cryogenic measurement systems, lithography equipment
Responsibilities
Conduct exhaustive literature review on spin-qubit complexity, develop SET architectures in advanced CMOS FDSOI, implement innovative 2D qubit matrix architectures, optimize qubit layout using advanced lithography, perform 3D simulations and fabricate test structures on silicon, characterize qubits and SETs in cryogenic regime, analyze dielectric traps at room and low temperatures
Seniority
PhD level, research-focused IC
