CareerPlan

CDI - Ingénieur process R&D PLP (Defectivité et Metrologie AOI AVI) F/H

Tours, FranceFull-time2025-11-28 → 2026-11-10

Core

R&D Process Engineer responsible for the qualification, validation, and industrialization of AOI (Automatic Optical Inspection) and Metrology processes for semiconductor pilot lines.

Role type

Senior IC R&D Process Engineer (Semiconductors)

Builds

Semiconductor manufacturing processes and equipment qualification

Domain

Semiconductor manufacturing / Metrology / Defectivity

Required skills

Semiconductor process qualification, AOI recipe optimization, Metrology calibration, SPC analysis, Defect characterization and classification, FMEA, 8D problem solving, Change management

Preferred skills

Experience in defect characterization or Metrology, Leadership, Autonomy, Cross-functional collaboration

Technologies

AOI equipment, Contact angle meters, CVS, Titration, 3D profilers, UV spectrophotometers, Microsoft Office