Performance Architect, CPU Cluster
Core
Architecting and optimizing multi-core CPU cluster performance, focusing on cache hierarchies, coherent interconnects, memory bandwidth, and system scalability.
Role type
Senior IC CPU Performance Architect
Builds
Next-generation RISC-V CPUs and AI platforms
Domain
Semiconductor / CPU Microarchitecture / AI Infrastructure
Deliverable
production ML models | product features
Required skills
CPU microarchitecture, performance modeling, simulation (Gem5), cache coherence, interconnect design, memory hierarchy analysis, workload analysis, architectural tradeoff studies
Preferred skills
Chiplet architecture, compiler interaction, RTL design collaboration
Technologies
Gem5, RISC-V
Responsibilities
Analyze and optimize CPU cluster performance including cache, interconnects, and memory access; Build and use performance models to evaluate architectural concepts; Study real workloads to identify bottlenecks in cache misses, coherence traffic, and memory bandwidth; Lead architectural tradeoff studies across performance, scalability, bandwidth, latency, and power; Collaborate with CPU, cache, interconnect, memory, software, and system architects to translate analysis into design decisions
Seniority
Senior, hands-on IC
