Chip Architecture Leader
Core
Define advanced chip architectures for co-packaged optics and lead the co-optimization of SerDes, analog front ends, and optical transceivers for datacenter/AI compute optical interconnect products.
Role type
Head of Chip Architecture (Senior, hands-on IC & Manager)
Builds
High-volume photonics products for AI and HPC workloads
Domain
Silicon photonics, optical interconnects, and data center infrastructure
Deliverable
production ML models | product features
Required skills
Silicon photonics, high-frequency electro-optic interfaces, lasers, optical amplifiers, fiber-optic communications, packaging/assembly techniques, SerDes, analog front ends, chip architecture definition, tapeout, validation, team leadership, technical selling
Preferred skills
Patents, publications, public speaking, R&D execution, talent retention
Technologies
Passage™, 3D-stacked photonics engines, 50+ GHz interfaces
Responsibilities
Guide and mentor a team of chip architects across photonics, digital, and analog domains; Define chip architectures for optical interconnect demonstrations and products; Lead co-optimization of SerDes, analog front ends, and optical transceivers; Plan and execute development, tapeout, and validation timelines; Represent the architecture team in executive reviews and industry forums; Act as primary technical liaison for customers and partners; Drive technical selling processes; Research emerging optical interconnect technologies; Develop new IP and publish technical findings.
Seniority
Executive-level technical leadership with 10+ years experience