Senior Engineer II, Process Engineering (Advanced Packaging)
Core
Develop and optimize semiconductor processes for advanced packaging, focusing on thin-film deposition and materials characterization to enable breakthroughs in logic, memory, and power applications.
Role type
Senior IC process engineer (advanced packaging)
Builds
Next-generation semiconductor devices and packaging solutions (W2W/D2W Hybrid bonding, CoWoS, SoIC, InFO)
Domain
Semiconductor manufacturing / Advanced Packaging
Deliverable
production ML models | product features
Required skills
Thin-film deposition (ALD, PECVD, PVD), DOE/RSM experimental design, materials characterization (XPS, SIMS, RBS, AFM, XRD, TEM, SEM), process troubleshooting, project management
Preferred skills
Advanced packaging process flow integration (CoWoS, SoIC, InFO), equipment qualification data contribution, advanced metrology/inspection techniques
Technologies
ALD, PECVD, PVD, ECP, XPS, SIMS, RBS, AFM, XRR, XRD, TEM, SEM, ellipsometry
Responsibilities
Research and optimize deposition processes for hybrid bonding; design and analyze complex experiments; develop new films/processes for emerging applications; mentor engineers and lead technical problem-solving; collaborate with customers on requirements and demonstrations; troubleshoot equipment and ensure product transfer; draft technical papers and generate IP
Seniority
Senior, hands-on IC with mentorship responsibilities
