Senior/Staff System Validation Engineer
Core
Define strategy, develop tools, and perform system validation for Astera Labs' advanced semiconductor devices to ensure performance, durability, and stress resilience in networking and server/storage applications.
Role type
Senior/Staff System Validation Engineer (Semiconductor/SoC)
Builds
High-speed connectivity devices (CXL, Ethernet, NVLink, PCIe, UALink) for AI infrastructure
Domain
Semiconductor hardware validation, high-speed protocols, AI infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System validation strategy, high-speed protocol knowledge (Ethernet, CXL, PCIe, NVMe), silicon/system bring-up, validation and debug, Python coding, C/C++ familiarity, lab equipment operation (protocol analyzers, in-circuit debuggers), testing automation
Preferred skills
Device tree debugging, board system design, embedded firmware/drivers (C/C++), x86/ARM architecture, UEFI/Linux boot sequence, CXL compliance standards, DRAM memory subsystem tuning, schematic capture/PCB layout tools
Technologies
CXL, Ethernet, NVLink, PCIe, UALink, Python, C, C++, Cadence, Altium, DDR4, DDR5, X86, ARM, UEFI, Linux
Responsibilities
Define validation strategy for complex SoC/silicon products, develop validation tools, perform bring-up and debug on customer systems, operate lab equipment and automate testing, collaborate with memory vendors on calibration and tuning
Seniority
Senior, hands-on IC
