Intern - Design Architecture, HBM
Core
Research emerging trends in compute, networking, and storage infrastructure to guide future HBM architectural decisions for AI systems.
Role type
Intern, Design Architecture
Builds
Simulation frameworks, trend dashboards, and architectural analysis for next-generation AI memory systems.
Domain
Semiconductor / High Bandwidth Memory (HBM) / AI Systems
Deliverable
research
Required skills
Computer architecture, Digital systems, Hardware/software interaction, Python, C/C++
Preferred skills
AI workload behavior, ML training pipelines, Large Language Models (LLMs)
Responsibilities
Research emerging trends in compute, networking, and storage infrastructure; Support HBM architecture analysis by gathering and synthesizing data related to bandwidth, latency, and system-level memory requirements; Help develop or refine simulation frameworks used to model AI cluster performance and memory subsystem behavior; Participate in building trend dashboards using CSP benchmarks and industry datasets; Collaborate with mentors to explore architectural intercept opportunities for next-generation AI systems.
