SVE Validation framework and QA Engineer
Core
Develop, validate, and scale system-level test content and automation frameworks for Qualcomm SoC silicon validation across pre- and post-silicon phases.
Role type
Senior IC system validation framework and QA engineer
Builds
Scalable automation frameworks, QA tools, and validation content for SoC silicon
Domain
Semiconductor / SoC Design / Hardware Validation
Required skills
C/C++ embedded software development, SoC architecture (interconnects, power management, IPC), JTAG and kernel debugging (Lauterbach Trace32), logic analyzer and oscilloscope usage, source code management (Perforce, Git, SVN), software build toolchains (GCC, CLANG, RVDS, LLVM, Makefiles, linker/scatter files), automated QA tool development
Preferred skills
Bare-metal validation experience, low-power use case analysis, cross-functional collaboration with Design/DV/SW teams
Technologies
GCC, CLANG, RVDS, LLVM, Lauterbach Trace32, Perforce, Git, SVN, JTAG, Logic Analyzers, Oscilloscopes
Responsibilities
Design and develop system/IP validation frameworks for bare-metal and RTOS environments; Establish QA process and release cadence for SVE test infrastructure; Integrate SVE drivers and content to achieve release quality goals; Develop automated QA tools and flows for build quality metrics; Develop and enhance system validation content for system-level and low-power use cases; Interface with IP validation and cross-functional teams to debug complex issues and enable test infrastructure on Emulation and Post-Si environments
