Compute Optimization Engineer (DSP/Kernels)
Core
Optimize Hexagon DSP and instruction set architecture (ISA) definition, compiler tools, and Hexagon Library (QHL) for industry-wide benchmarks.
Role type
Compute Optimization Engineer (DSP/Kernels)
Builds
Hexagon Library (QHL), compiler tools, and optimized DSP solutions for customers.
Domain
Semiconductor / Signal Processing / Hardware-Software Co-design
Deliverable
production ML models
Required skills
C/C++/ASM, Python, processor architecture, SIMD, multithreading, fixed/floating-point math, signal processing pipelines (Audio/Video/Radar/Modem/AI)
Preferred skills
GenAI tools, open-source development of industry benchmarks, AI pipeline implementation on modern architectures
Technologies
Hexagon DSP, QHL, SIMD, VLIW
Responsibilities
Implement industry-wide benchmarks on Hexagon DSP, improve future generation of HW and ISA definition, optimize compiler tools, enhance Hexagon Library (QHL) for customer delivery
Seniority
Mid-Senior (3-7 years experience)
