CareerPlan

Intern - DRAM Process Integration

Boise, Idaho, United States of AmericaInternship2026-08-31 → 2026-11-10

Core

Develop next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture.

Role type

Intern, Process Integration Engineer

Builds

Future DRAM architectures and memory technologies

Domain

Semiconductor / Memory / DRAM

Deliverable

production ML models

Required skills

Semiconductor process integration, Device physics, Technology scaling, Design of Experiments (DOE), Statistical analysis, Data-driven problem-solving, Technical documentation, Cross-functional coordination

Preferred skills

PhD in Electrical Engineering/Microelectronics, Technical leadership in R&D, Innovative solution development, AI/Generative AI proficiency, Statistical modeling, Machine learning techniques

Technologies

AI tools, AI-Assisted tools, Generative AI, Machine learning

Responsibilities

Define technology achievements, design rules, structural requirements, and electrical specifications; Collaborate with process development, simulation, process architecture, circuit design, and quality teams; Develop and maintain documentation related to process integration plans, technical risks, issue resolution, and characterization strategies; Evaluate alternative device architectures, process enablers, and scaling approaches; Leverage approved Artificial Intelligence (AI) and AI-Assisted tools to enhance technical analysis, data interpretation, productivity, and engineering decision-making.