Metrology Overlay Process Engineer, DRAM
Core
Developing and optimizing overlay metrology processes for DRAM photolithography flows to ensure precision, accuracy, and throughput for device roadmaps.
Role type
Metrology Process Development Engineer
Builds
Metrology systems, measurement techniques, and calibration procedures for semiconductor device characterization.
Domain
Semiconductor manufacturing (DRAM)
Required skills
Overlay metrology, lithography process metrics, image and diffraction based overlay, SEM, scatterometry/OCD, instrumentation calibration, semiconductor manufacturing processes (diffusion, CVD, Etch, Lithography), JMP, Python, AI tools
Preferred skills
Experience with next generation processes, technology transfer, cost of ownership analysis, layout optimization
Technologies
JMP, Python, AI tools (CoPilot, Claude Code)
Responsibilities
Drive understanding of new metrology technology and measurement techniques; Partner with equipment vendors on software/hardware improvement; Optimize and maintain calibration of metrology systems; Work with process engineers to optimize measurements for device flows; Develop applications on next generation processes; Evaluate new metrology tools; Craft and optimize metrology target layouts
Seniority
Mid-level, hands-on IC