PRINCIPAL ENGINEER – FE OCT CPEE HVM DRY ETCH
Core
Principal Engineer leading productivity, yield, quality, and cost improvement engagements for Dry Etch processes in semiconductor manufacturing.
Role type
Principal Engineer, Semiconductor Process & Equipment (Dry Etch)
Builds
Dry Etch process steps, hardware CIP roadmaps, and tool performance improvements for DRAM/NAND production.
Domain
Semiconductor Manufacturing / Dry Etch / Plasma Physics
Required skills
Dry Etch process optimization, Plasma process parameter development, Failure analysis (FMEA, 8D, SPC), Hardware CIP roadmap development, Cross-functional collaboration, Data analysis (FDC, SPC), Supplier management, Safety compliance, AI tool integration
Preferred skills
Experience with LAM, TEL, AMAT Dry Etch platforms, Defect reduction strategies, IoT/FDC sensor implementation, Sustainability initiatives (energy/waste reduction)
Technologies
LAM Kiyo/Flex/Vantex/Versys, TEL Tactras/RK, AMAT Sym3/Centura, FDC, SPC, IoT sensors, AI tools
Responsibilities
Strategize and lead productivity, yield, quality, and cost improvement engagements; Collaborate on defect reduction, particle control, and chamber-matching; Develop process and hardware CIP roadmaps; Drive process and hardware improvement for safety, quality, and sustainability; Partner with suppliers on equipment start-up and qualification; Improve tool efficiency and utilization; Set up IoT/FDC sensors for chamber health monitoring; Establish process windows and recipe robustness.
Seniority
Principal, hands-on IC with strategic leadership