Principal Engineer, Frontend Organizations Central Team, Dry Etch Process
Core
Lead productivity, yield, and quality improvement engagements for global Dry Etch fleets through plasma process optimization, hardware CIP roadmaps, and supplier collaboration.
Role type
Principal Engineer, Semiconductor Process & Hardware (Dry Etch)
Builds
Dry Etch process windows, hardware CIP roadmaps, and tool efficiency solutions for DRAM/NAND manufacturing.
Domain
Semiconductor Manufacturing / Dry Etch / Plasma Physics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Plasma process optimization, Dry Etch hardware qualification, CIP roadmap development, defect/particle control, process window establishment, FDC/SPC analysis, supplier partnership management, tool utilization improvement, sustainability/energy optimization, recipe robustness.
Preferred skills
Experience with LAM, TEL, AMAT Dry Etch platforms, new chemistry/hardware qualification, chamber-matching strategies, IoT/FDC sensor implementation.
Technologies
FDC, SPC, RF networks, Gas delivery systems, ESC, Plasma sources, IoT sensors, Telemetry systems.
Responsibilities
Strategize and lead productivity, yield, quality, and cost improvement engagements; Collaborate on defect reduction, particle control, and CD uniformity; Develop process and hardware CIP roadmaps; Drive process & hardware improvement for safety, cost, and throughput; Partner with suppliers on equipment acceptance criteria and installation; Improve tool efficiency and utilization; Set up IoT/FDC sensors for chamber health monitoring; Establish process windows and recipe robustness; Enable energy savings and waste reduction solutions.
Seniority
Principal, hands-on IC with strategy & mentorship
