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Senior Hardware Integration Test Engineer

San Francisco💼 Full-time💰 $150,000–$150,000🗓 2026-07-06 → 2026-07-31

Core

Design, build, and maintain hardware-in-the-loop (HITL) testbeds to validate satellite systems before flight.

Role type

Senior Hardware Integration Test Engineer

Builds

Flight-representative HITL testbeds for satellite hardware and software validation

Domain

Aerospace / Satellite Communications

Deliverable

production ML models | product features | infrastructure

Required skills

Hardware integration, systems bring-up, embedded systems, EGSE, logic analyzers, oscilloscopes, Python for test automation, Linux command line, version control, schematic reading, circuit debugging

Preferred skills

Flight software architectures, telemetry systems, simulation frameworks, networked lab infrastructure, Kubernetes, Linux system administration

Technologies

Python, Linux, Git, EGSE

Responsibilities

Own full lifecycle of flatsat and HITL testbed builds, scope and design harnessing needs, serve as on-call point of contact for testbed health, diagnose and resolve hardware/software failures, drive testbed architecture decisions, expand simulation capabilities, develop tooling for observability and automated operations

Seniority

Senior, hands-on IC

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