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Senior RDA Defect Analysis & Yield Improvement Engineer

Hiroshima, Japan💼 Full-time🗓 2026-06-30 → 2026-09-25

Core

Lead quality and yield improvement and excursion prevention across the entire manufacturing line as a Sustaining Engineer within the RDA (Real-time Defect Analysis) team.

Role type

Senior IC manufacturing yield engineer (semiconductor)

Builds

Fab-level KPI improvements, defect analysis systems, and standardized improvement strategies

Domain

Semiconductor manufacturing / Quality Control

Deliverable

production ML models | product features | dashboards & analysis | infrastructure

Required skills

Root cause analysis, SPC, large-scale data analysis, JMP, Python, Tableau, semiconductor process knowledge, cross-functional leadership

Preferred skills

Digital transformation, automation, rule-based systems, mentoring junior engineers

Technologies

JMP, Python, Tableau, Microsoft Office (Excel, Word, PowerPoint)

Responsibilities

Lead root cause analysis of complex defect and abnormality issues; Enhance trend monitoring and early abnormality detection using SPC and large-scale data analysis; Drive improvement initiatives with quantified impact (e.g., Wafer at Risk, Yield); Lead cross-functional teams to drive improvement activities; Mentor and develop junior engineers

Seniority

Senior, hands-on IC

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