IOMMU/Virtualization & Memory Mapping Architect
Core
Architect IOMMU usage for device memory access and isolation, define memory address translation strategies across CPU/GPU/NPU, and enable virtualization and hypervisor-based memory steering to support secure, performant multi-engine execution for AI workloads.
Role type
Senior IC hardware architecture engineer (IOMMU/Virtualization)
Builds
System-level memory virtualization, mapping, and isolation solutions for heterogeneous compute engines
Domain
Semiconductor hardware design, virtualization, AI infrastructure
Deliverable
production ML models
Required skills
IOMMU architecture, memory address translation, DMA optimization, coherency models, hardware architecture, FPGA, systems design, electrical engineering, hardware design, debugging
Preferred skills
Computer engineering, computer science, MATLAB, printed circuit board design, schematic capture, simulations, new product development
Technologies
CPU, GPU, NPU, FPGA, Hypervisor, DMA, Oscilloscope
Responsibilities
Architect IOMMU usage for device memory access and isolation; Define memory address translation strategies across CPU/GPU/NPU; Enable virtualization and hypervisor-based memory steering; Optimize DMA, shared buffers, and coherency models; Ensure security and isolation for multi-tenant / enterprise workloads; Collaborate on virtualization strategies for AI execution environments
Seniority
Senior, hands-on IC
