Engineer, Product Engineering (Media Health Reliability), Heteregenous Integration - High Bandwidth Memory
Core
Define and develop reliability stress test flows and plans for High Bandwidth Memory (HBM) products, driving down defect rates through optimized manufacturing test strategies and root cause analysis.
Role type
Senior IC reliability engineer (semiconductor manufacturing)
Builds
HBM products (DRAM architecture)
Domain
Semiconductor manufacturing / Memory storage
Required skills
CMOS technology, DRAM architecture, device physics, electric failure analysis (EFA), physical failure analysis (PFA), data analysis, statistics, Python, JMP, root cause analysis, project management
Preferred skills
Semiconductor devices, circuit design, product validation
Technologies
Python, JMP
Responsibilities
Define and develop reliability stress test flows and plans; Manage qualification execution progress and drive issue resolution; Drive down Extrinsic and Intrinsic Reliability (DPM) through optimized test strategies; Debug and identify root causes of device issues via EFA and PFA; Provide recommendations to fab teams for new process conversions to reduce cost and increase yields; Manage risks associated with DPM process conversions; Collaborate with cross-functional teams (Fab, Design, Quality) for holistic product development.
Seniority
Senior, hands-on IC