F15 ADTJ PI Device Engineer
Based in Japan
Core
Optimizing device performance and yield in high-volume DRAM manufacturing by balancing process integration conditions and repair density consumption.
Role type
Senior Process Integration Engineer (Device)
Builds
High-volume DRAM memory chips
Domain
Semiconductor manufacturing (DRAM)
Required skills
Semiconductor process engineering, Data analysis, Statistics, Cross-functional collaboration, Root-cause analysis, Corrective/preventive actions, SWR creation, PCRB management
Preferred skills
Yield improvement, Defect analysis, Metrology analysis, SPC, Structured problem solving
Technologies
SPC, Metrology tools
Responsibilities
Create SWRs for device performance improvement, Balance process integration and device performance conditions, Proceed with PCRB using data summaries, Collaborate with PE/GQ/Design/TD teams and other sites