Software Engineer, TPU Compilers
Core
Optimize model execution on TPUs across model code, kernels, and hardware to improve latency, throughput, and hardware utilization.
Role type
Senior IC machine-learning systems engineer (TPU compilers)
Builds
Optimized TPU kernels and performance tools for ML workloads
Domain
Hardware acceleration / Machine Learning
Deliverable
production ML models
Required skills
TPU kernel optimization, workload profiling, latency reduction, throughput optimization, hardware utilization, quantization techniques, model architecture understanding, stack-level performance analysis, systematic debugging, open-ended problem solving
Preferred skills
Experience with quantization, attention kernels
Technologies
TPUs
Responsibilities
Profile workloads to identify bottlenecks, develop and optimize kernels based on model behavior, build benchmarks and tools to measure performance and validate correctness, partner with researchers to support new model architectures and productionize improvements
