Staff Test (Semiconductors) Quality
Core
Senior technical role strengthening semiconductor test strategy, coverage, and manufacturing quality controls across wafer sort, final test, and production release flows.
Role type
Staff Test Quality Engineer (Semiconductors)
Builds
High-reliability semiconductor products (analog, digital, mixed-signal, discrete, multi-chip modules)
Domain
Semiconductor manufacturing and testing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog and digital test development, test programming, test methodology definition, vector pattern generation and analysis, probe and final test data analysis, debug, characterization, production correlation, statistical data analysis, 8D problem solving, FTA, risk analysis, AEC-Q100 compliance, ISO standards implementation, test coverage optimization, yield improvement analysis, hardware/software flow evaluation
Preferred skills
Advanced degree in EE/CE/Semiconductor Engineering, familiarity with Exensio platform, experience with Eagle/Teradyne/Flex/LTX/Advantest/Verigy ATE platforms
Technologies
Eagle, Teradyne/Flex, LTX, Advantest, Verigy, Exensio
Responsibilities
Establish and maintain corporate standards for DFT, DFM, test coverage, guardbanding, and mandatory production test requirements; Review and audit analog, digital, mixed-signal, wafer sort, and final test programs to verify datasheet compliance and test coverage effectiveness; Provide hands-on technical leadership for test-related customer issues, 8D investigations, failure containment, root cause analysis, and corrective action plans; Analyze large datasets to detect and control test stability issues and improve first pass yields on high count parallel test solutions; Define architecture, workflows, documentation requirements, and governance models for standardized test solution deployment and production change management; Ensure controls are implemented on commercial and automotive projects to meet AEC-Q100 and ISO standards; Improve outgoing defect levels by analyzing customer returns, low-yield lots, marginal distributions, and recurring failure modes to develop improved screens and test coverage enhancements
Seniority
Staff, hands-on IC
