Staff System Validation Engineer
Core
Pre-silicon system validation of power-conversion ICs using FPGA-based emulation platforms.
Role type
Staff System Validation Engineer (Pre-Silicon)
Builds
Emulation platforms based on SoC RTL for power-conversion ICs
Domain
Semiconductor / Power Electronics / FPGA Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FPGA design flow (verification, synthesis, partitioning, P&R, timing closure), SoC RTL porting, Verilog modeling, Python, C/C++, lab instrumentation (oscilloscope, spectrum analyzer, logic analyzer), power-conversion circuits, mixed-signal blocks (ADC, DAC, PLL, amplifiers), interface protocols (I2C, SPI, I2S), Arm Development Studio (Cortex-A9)
Preferred skills
Jama, Jira, Confluence
Technologies
FPGA, Verilog, Python, C/C++, Arm Development Studio, Jama, Jira, Confluence
Responsibilities
Port SoC RTL to FPGA including placement and timing closure, Develop Verilog models to emulate analog functions, Perform FPGA verification and system integration, Support ongoing FPGA and board-level validation activities, Conduct pre-silicon verification using simulation tools and FPGA platforms
Seniority
Staff, hands-on IC
