Lead Test Engineer
Core
Lead Test Engineer developing test strategies, ATE hardware interfaces, and silicon characterization for multi-rail power management devices and DCDC converters.
Role type
Senior IC test engineer (power management/analog)
Builds
Production test programs, ATE hardware interfaces, and silicon qualification solutions for power management ICs
Domain
Semiconductor hardware engineering / Power management / Analog electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ATE hardware and software development, Analog circuit design and testing, Silicon characterization and failure analysis, Yield analysis and optimization, Test program and hardware offload, Lab equipment operation (scopes, power supplies, sourcemeters), Data analysis (STDF, Spotfire), C++/Python/C# scripting, IC product development lifecycle management
Preferred skills
Mixed-signal test techniques, TI roadmap tester experience, Offshore manufacturing test program management, Advanced programming/scripting (C++, Python, C#), Revision control (Git, Subversion)
Technologies
Teradyne Eagle, iFlex, LTX, VLCT, Spotfire, dataPower, STDF, C++, Python, C#, Git, Subversion
Responsibilities
Design ATE hardware interface boards, Generate test plans and create test/characterization programs, Debug silicon on ATE and correlate with bench data, Analyze silicon results and support failure analysis, Perform statistical analysis of yield fallout and optimize test time, Release products to volume production, Define and implement test strategies for new DCDC converter products
Seniority
Senior, hands-on IC